Communication systems have become ubiquitous in modern society and are found wherever information is to be transmitted from one point to another. Telephone, radio, and television are common everyday examples of communications systems. Electronic communication and, particularly, electronic communication via the transmission of electrical signals over distances, has almost completely replaced all other forms of information transmission over distances. In a basic electronic communications model, information is transmitted, passes through a medium, and is received by a user. At the transmission end, a transmitter creates a signal in such a form as to optimize the signal's probability of detection at the output. At the reception end, a receiver performs the known inverse of the functions performed by the transmitter to extract information from the created signal. The design of the transmitter and receiver need to rely on a detailed mathematical description of the information transmission
Advent of modern digital electronics has made it possible to utilize digital techniques to synthesize a signal on the transmission end. The synthesized signal emerging from the synthesizer contains the information which is to transmitted. The digital synthesizer performs the function of an encoder/modulator. Integrated circuit technology has made it possible to fabricate complete digital synthesizers on a single integrated circuit.
In addition to data communication applications, as described above, digital synthesis technology can be used to synthesize signals for any signal application, for example wave table sound synthesis, music CD players, and the like. Essentially, digital techniques can be used to synthesize signals for virtually any arbitrary application.
FIG. 1 shows a typical prior art digital synthesis system 100. A typical digital synthesis system comprises a look up table 101 sending data samples to a digital to analog converter (DAC) 102. DAC 102 is coupled to a low pass filter (LPF) 103. The look up table 101 is typically implemented in either random access memory (RAM) or read only memory (ROM). Data samples located in the look up table are typically accessed via memory counter techniques. More complex applications often require more complex logic according to the application. As look up table 101 is accessed, the resulting stream of digital samples are fed to the DAC 102. The data samples are converted by the DAC 102 into an analog signal. The characteristics of the analog signal are fundamentally determined by the data samples fed into the DAC 102. Typically, the signal emerging from the DAC 102 has a stairstep shape due to the nature of the digital to analog conversion process. The emerging signal, due to its stairstepped shape, contains a large number of unwanted frequency components. The output of the DAC 102 is sent through a low pass filter to attenuate unwanted high frequency components. In so doing, the LPF 103 smoothes the shape of the emerging analog signal. LPF 103 is thus often referred to as a smoothing filter.
The usual requirements on the output of the digital synthesizer are signal quality and spectrum template. These requirements, in turn, translate into sampling frequency, resolution, linearity, and noise constraints on the DAC. The requirements also dictate the frequency response specifications of the filter. In some applications, there may be very tight offset specifications levied upon an analog signal generated by the synthesizer. For example, in the case of quadrature phase shift keying modulation, the offset on any of the in-phase and in-quadrature signals is a major contributor to the total phase error of the system.
FIG. 2 shows a schematic diagram of a quadrature amplitude modulation system 200. The system 200 includes a transmitter 201 and a corresponding quadrature amplitude receiver 202. Transmitter 201 transmits a quadrature amplitude modulated signal .phi.(t) to receiver 202. Using the orthogonality of sine and cosine of a carrier frequency, the transmitter 201, in essence, transmits two different signals, f.sub.1 (t) and f.sub.2 (t), simultaneously on the same carrier frequency. The signals modulate a cosine carrier component cosw.sub.c t and a sine carrier component sinw.sub.c t, which are subsequently summed, resulting in the modulated signal .phi.(t). This scheme is typically referred to as quadrature multiplexing. The modulated signal theoretically carries twice the information, f.sub.1 (t) and f.sub.2 (t), of an ordinary modulated signal. Each signal f.sub.1 (t) and f.sub.2 (t), is recovered by synchronous detection of the received modulated signal .phi.(t) using carriers of the same frequency but in phase quadrature, cosw.sub.c t and sinw.sub.c t.
Referring still to FIG. 2, quadrature multiplexing is an efficient method of transmitting two messages signals within the same bandwidth required to transmit one message signal. Quadrature multiplexing, however, requires precise phase synchronization of transmitter and receiver. Large scale use of quadrature multiplexing is typically limited by the rigid demands on the phase synchronization required, among other factors. Thus, where a digital synthesizer is used to synthesize any of the signals of the transmitter 201 or receiver 202, there are very ridged specifications for the offset of the analog signal emerging from the digital synthesizer. This is because an offset in any of the signals caused by the digital synthesizer largely contributes to the total phase error of the system 200.
FIG. 3A and FIG. 3B each show an operational amplifier used in the circuitry comprising a DAC (e.g., DAC 102) and in the circuitry comprising an LPF (e.g., LPF 103) and each show different prior art solutions for offset correction. FIG. 3A and FIG. 3B both show one prior art offset compensation technique. The offset of a digital synthesizer is mainly due to the offset of an operational amplifier 301 used in the circuitry comprising the DAC (not shown) and in the circuitry comprising the LPF (not shown). The offset of the operational amplifier 301 is compensated for by using zeroing capacitors 302a and 302b. In FIG. 3A, the offset is sampled on the zeroing capacitors 302a and 302b, then used in series on the inputs 303 of amplifier 301. The zeroing capacitors 302a and 302b are reset via ordinary CMOS switches 315a and 315b. In FIG. 3B the offset is nulled by connecting the zeroing capacitors 301 directly in series with the inputs of the amplifier 301.
In FIG. 3C, a second prior art offset compensation technique is shown. As in FIG. 3A and FIG. 3B, the offset of a digital synthesizer is mainly due to the offset of the operational amplifier 310 used in the circuitry comprising the DAC and in the circuitry comprising the LPF, however, in FIG. 3C, the operational amplifier 310 has two input channels. Inputs 311 and 312 comprise the first input channel and Inputs 313 and 314 comprise the second input channel. The second input channel, inputs 313 and 314, has a reduced DC gain. The charge stored on the two zeroing capacitors 302a and 302b is multiplied by the ratio between the gain of the first input channel and the second input channel, and is thus less sensitive to charge decay in the zeroing capacitors or charge injection through the CMOS switches 315a and 315b. The advantage of the circuit of FIG. 3C is the fact that it avoids having the zeroing capacitors 302a and 302b on the active analog signal path when the amplifier is operating in normal mode (CMOS switches 315a and 315b open).
Both the first prior art technique (FIG. 3A and FIG. 3B) and the second prior art technique (FIG. 3C) suffer from charge decay, e.g., charge decay on the zeroing capacitors through current leakage. As a result, both techniques require a periodic re-calibration. The second technique is more accurate than the first technique, however, the auxiliary input channel of the second technique requires an additional amount of power in order to remain active.
Both techniques rely on the accuracy of the additional analog components, the zeroing capacitors 302a and 302b. As with any analog component manufactured using integrated circuit fabrication technology, the electronic characteristics of the zeroing capacitors are subject to a normal fabrication process variation. In order to achieve an offset attenuation below the least significant bit (LSB) level in the digital synthesizer as a whole (i.e., the DAC and the LPF), the capacitance of the zeroing capacitors 302a and 302b needs to be precisely controlled. The maximum resolution of the DAC is thus limited by the precision with which the zeroing capacitors 302a and 302b can be fabricated. In addition, the extra circuitry in the analog signal path during normal operation affects the speed and accuracy of the digital synthesizer. An external device can be added to the digital synthesizer to provide an additional amount of compensation, however, such a solution would defeat the simplicity of having a totally integrated device. The external device would also require an additional amount of power.
Thus, what is required is a digital synthesis system which avoids the offset compensation problems of the prior art. What is required is a DAC offset calibration system which automatically compensates for offset in order to achieve an offset attenuation below the LSB level on the whole synthesizer (DAC+LPF). The offset calibration system should not rely upon the accuracy of any analog component and should be totally integrated such that an external device would not be required. What is further required is an offset calibration system which does not add any extra circuitry in the analog path in normal operation mode. The offset calibration system should not affect the accuracy or the speed of the digital synthesizer, or increases overall power consumption. What is further required is an offset calibration system which ensures any residual offset remains below the LSB level, regardless of the resolution of the digital synthesizer.